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Freescale Semiconductor, Inc.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Document order number: MC34710 Rev 1.0, 04/2004
Preliminary Information Adjustable Dual Output Switching Power Supply
The 34710 is a dual-output power regulator IC that integrates a switching regulator, a linear regulator, supervisor circuitry, and a power supply sequencer. With a wide operating input voltage range of 12 V to 32 V and robust temperature limits, the 34710 is applicable in many commercial and industrial applications that use an MCU.
34710
ADJUSTABLE DUAL OUTPUT SWITCHING POWER SUPPLY
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A user-selectable 5.0 V/3.3 V buck switching regulator is provided for board-level I/Os and user circuitry. The regulator is capable of delivering up to 1.0 A. The MCU core voltage is an adjustable 3.3 V/2.5 V/1.8 V/1.5 V linear voltage regulator that can supply up to 500 mA. The switching and linear regulator output voltage are determined through three digital input mode terminals that can be controlled by an MCU. Features * High-Current Adjustable 5.0 V/3.3 V Switching Regulator * Low Noise User-Selectable 3.3 V/2.5 V/1.8 V/1.5 V Linear Regulator * On-Chip Thermal Shutdown and Error Reset Circuitry * Supervisory Functions (Power-ON Reset and Error Reset Circuitry) * Sequenced I/O and Core Voltages * Pb-Free Packaging Designated by Suffix Code EW
EW (Pb-FREE) SUFFIX CASE 1324-02 32-LEAD SOICW-EP
ORDERING INFORMATION
Device PC34710EW/R2 Temperature Range (TA) 0C to 85C Package 32 SOICW-EP
Simplified Application Diagram
34710 Simplified Application Diagram
12 V to 32 V B+ Vb CP2 CP1 Mode0 Mode1 Mode2 LINB+ RST GND VCORE VCORE VSWITCH VI/O_OUT MCU VI/O
34710
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. (c) Motorola, Inc. 2004
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B+
2000 Hz Oscillator
Charge Pump
CP1 CP2 Vb
Supervisory and Temperature Shutdown
RST
Ct
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Bandgap VI/O Switching Regulator VCORE Linear Regulator VI/O_OUT VSWITCH
MODE0
MODE1 MODE2 LINB+
VCORE (2)
GND Figure 1. 34710 Simplified Internal Block Diagram
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RST MODE0 MODE1 MODE2 NC NC NC NC NC NC NC NC GND NC NC NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
Ct CP1 CP2 Vb B+ VSWITCH VI/O_OUT LINB+ VCORE VCORE NC NC NC NC NC NC
TERMINAL FUNCTION DESCRIPTION
Terminal 1 2 3 4 5-12, 14-22 13 23, 24 25 26 27 28 29 30 31 32 Terminal Name
RST
Formal Name Reset Mode Control
Definition Reset input and output. This terminal is open drain. These input terminals control VI/O_OUT and VCORE output voltages.
MODE0 MODE1 MODE2 NC GND VCORE LINB+ VI/O_OUT VSWITCH B+ Vb CP2 CP1 Ct
No Connects Ground Core Voltage Regulator Output Core Voltage Regulator Input VI/O Switching Regulator Feedback VI/O Switching Regulator Switch Output Power Supply Input Boost Voltage Switching Capacitor 2 Switching Capacitor 1 Reset Delay Capacitor
No internal connection to this terminal. Ground. Core regulator output voltage. Core regulator input voltage. Feedback terminal for VI/O switching regulator and internal logic supply. VI/O switching regulator switching output. Regulator input voltage. Boost voltage storage node. Charge pump capacitor connection 2. Charge pump capacitor connection 1. Reset delay adjustment capacitor.
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MAXIMUM RATINGS All voltages are with respect to ground unless otherwise noted.
Rating Symbol Max Unit
GLOBAL ABSOLUTE MAXIMUM RATINGS
Input Power Supply Voltage IB+ = 0 A Terminal Soldering Temperature (Note 1) Power Dissipation (Note 2) ESD Standoff Voltage Non-Operating, Unbiased, Human Body Model (Note 3) Thermal Resistance VESD1 RJA RJA RJC 2000 C/W 45 25 2.0 TSOLDER PD VB+ -0.3 to 36 260 3.0 C W V V
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Junction-to-Ambient (Note 4) Junction-to-Ambient (Note 2) Junction-to-Case
GLOBAL OPERATING RATINGS
Operating Ambient Temperature Operating Device Junction Temperature Input Power Supply Voltage IB+ = 0 A to 3.0 A Quiescent Bias Current from B+ (Note 5) VB+ = 12 V to 32 V Operating Junction Temperature TJ IB+(q) 7.5 -0 to 105 C TA TJ VB+ 12 to 32 mA 0 to 85 105 C C V
VI/O SWITCHING REGULATOR (Note 6)
Maximum Output Voltage Startup Overshoot (COUT = 330 F) MODE0 = 0 MODE0 = Open Maximum Output Current TA = 0C to 105C IVI/O 1.2 VI/O(STARTUP) 5.4 3.6 A V
Notes 1. Soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. 2. 3. 4. 5. 6. With 2.0 in2 of copper headsink. ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 ). With no additional heatsinking. Maximum quiescent power dissipation is 0.25 W. 12 V VB+ 32 V and -20C TJ 145C unless otherwise noted.
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MAXIMUM RATINGS (continued) All voltages are with respect to ground unless otherwise noted.
Rating Symbol Max Unit
VCORE LINEAR REGULATOR (Note 7)
Maximum Output Voltage Startup Overshoot (COUT = 10 F) (Note 8) MODE[2:0] = [0,x,0] MODE[2:0] = [0,x,Open] MODE[2:0] = [Open,x,0] MODE[2:0] = [Open,x,Open] Maximum Output Current TJ = 0C to 105C, VLINB+ VCORE (NOM) + 0.8 V (Note 9) IVCORE 500 VCORE (STARTUP) 3.6 2.7 2.0 1.65 mA V
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Notes 7. 12 V VB+ 32 V and -20C TJ 145C unless otherwise noted. 8. 9. Refer to Table 1, page 10. Pulse testing with low duty cycle used.
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STATIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions 4.75 V VIO 5.25 V, 12 V VB+ 32 V, and 0C TJ 105C unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25C under nominal conditions unless otherwise noted.
Characteristic Symbol Min Typ Max Unit
VI/O SWITCHING REGULATOR
Logic Supply Voltage (IVI/O = 25 mA to 1.0 A) MODE0 = 0 MODE0 = Open Logic Supply Current VI/O = Nominal, Power Dissipation in Switching Regulator = 0.45 W Output On Resistance IVI/O 0.025 RDS(ON) 0.5 VI/O(SOFT) - - 2.5 A ILIMIT (OP) ILIMIT (SOFT) VVSWITCH (MIN) -0.5 - - 2.1 1.3 - - 3.2 1.8 V TBD 2.0 V - 1.0 VI/O 4.8 3.15 - - 5.2 3.45 A V
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VB+ = 12 V to 32 V Soft Start Threshold Voltage MODE0 = X Current Limit Threshold (TJ = 25C to 100C) Normal Operation Soft Start, VI/O 2.5 V Minimum Voltage Allowable on VSWITCH Terminal TJ = 25C to 100C
VCORE LINEAR REGULATOR
Supply Voltage (IVCORE = 5.0 mA to 500 mA) (Note 10) MODE[2:0] = [0,x,0] MODE[2:0] = [0,x,Open] MODE[2:0] = [Open,x,0] MODE[2:0] = [Open,x,Open] Supply Current VCORE = VCORE (NOM) VCORE Dropout Voltage VCORE = VCORE (NOM), IVCORE = 0.5 A Regulator Input Voltage VCORE = VCORE (NOM), IVCORE = 0.5 A Normal Current Limit Threshold TJ = 25C to 100C, VLINB+ = VCORE (NOM) + 1.0 V Notes 10. Refer to Table 1, page 10. ILIMIT 800 - 1000 VLINB+ VCORE (NOM) + 1.0 - 10 mA IVCORE(DROPOUT) 0.8 - - V IVCORE 1.0 - 500 V VCORE (NOM) 3.15 2.35 1.71 1.425 - - - - 3.45 2.65 1.89 1.575 mA V
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STATIC ELECTRICAL CHARACTERISTICS (continued) Characteristics noted under conditions 4.75 V VIO 5.25 V, 12 V VB+ 32 V, and 0C TJ 105C unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25C under nominal conditions unless otherwise noted.
Characteristic Symbol Min Typ Max Unit
MODE TERMINALS OPERATING VOLTAGES
MODE Control Terminals Low Voltage TJ = 0C to TBDC, VB+ = 12 V to 32 V MODE Control Terminals High Voltage TJ = 0C to TBDC, VB+ = 12 V to 32 V MODE Control Terminals Voltage with Input Floating TJ = 0C to TBDC, VB+ = 12 V to 14 V VMODE(FLOAT) 7.0 8.0 - - 12 13.2 VIH (MODEn) 2.6 - - V VIL(MODEn) - - 0.825 V V
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TJ = 0C to TBDC, VB+ = 14 V to 32 V
SUPERVISOR CIRCUITRY
Minimum Function VB+ for Charge Pump and Oscillator Running Minimum VB+ for RST Assertion, VB+ Rising
RST Low Voltage
VB+ (MIN) VB+(ASSERT) VOL
9.0 2.0
- -
- -
V V V
VB+ = 2.0 V, IRST 5.0 mA
RST VI/O Threshold
-
-
0.4 V VI/O(NOM)
VI/O Rising VI/O Falling
RST Hysteresis for VI/O RST VCORE Threshold
VI/Ot+ VI/OtVHYSVI/O
- VI/O (NOM)
- - -
- 80 mV
- 100 VCORE (NOM) mV V
- 225 mV
10
VCORE Rising VCORE Falling
RST Hysteresis for VCORE
VCOREt+ VCOREtVHYS CORE
- VCORE (NOM)
- -
- 80 mV
- mV
- 225 mV
10
VB+ = 12 V to 32 V VCORE - VI/O for VCORE Shutdown VB+ = 12 V to 32 V Thermal Shutdown Temperature TJ Rising Overtemperature Hysteresis TJ (HYSTERESIS) TJ (TSD) VCORE (SHUTDOWN)
-
100 V
-
-
TBD C
170 20
- -
- TBD C
Vb CHARGE PUMP
Boost Voltage (Note 11) VB+ = 12 V to 32 V, Ivb = 0.5 mA Notes 11. Bulk capacitor ESR 10 . Vb VB+ +10 V - VB+ +12 V V
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DYNAMIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions 4.75 V VIO 5.25 V, 12 V VB+ 32 V, and 0C TJ 105C unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25C under nominal conditions unless otherwise noted
Characteristic Symbol Min Typ Max Unit
VI/O SWITCHING REGULATOR
Duty Cycle Switching Rise and Fall Time Load Resistance = 100 , VB+ = 30 V Switching Rise and Fall Time Load Resistance = 100 , VB+ = 30 V tr + tf - - 50 D tr, tf 25 - - ns 45 - 55 % ns
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SUPERVISOR CIRCUITRY
RST Delay
t delay 48 t filter 1.0 tf - t slpl (Note 13) t phsl - - 10 - 125 - 6.0 - 82
ms
Cdelay = 0.1 F
RST Filter Time
s
VB+ = 9.0 V
RST Fall Time
ns
CL = 100 pF, RPULLUP = 4.7 k, 90% to 10% External Low (Note 12) VI/O = 5.0 V
RST Recovery Time Before Next RST Input (Note 12)
ns 30 - - s
VI/O = 5.0 V
INTERNAL OSCILLATOR
Charge Pump and VI/O Switching Regulator Operating Frequency VB+ = 9.0 V to 32 V Notes 12. See Figure 2, RST Timing, page 9. 13. t slpl is an input. f OP 140 - 260 kHz
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Timing Diagram
External
RST
Input VIH VIL
t snl
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t slpl 34710
RST
t phsl t delay
VIH VIL
Figure 2. RST Timing
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SYSTEM/APPLICATION INFORMATION
INTRODUCTION VI/O Switching Regulator
The VI/O switching regulator output voltage is determined by the MODE digital input terminals. The 34710's MODE[2:0] select the output voltage (Table 1). For example, if MODE[2:0] = 0, 0, 0, then VI/O = 5.0 V; if MODE[2:0] = Open, Open, Open, then VI/O = 3.3 V. The MODE0 terminal controls the output voltage of both regulators. The topology of the regulator is a bang-bang buck regulator operating from the internal ~200 kHz oscillator. The MODE[2:0] terminals select the output voltage as depicted in Table 1. Table 1. VI/O and VCORE(NOM) Regulator Output Voltage Selection
MODE2 0 0 0 MODE1 0 0 Open MODE0 0 Open 0 Open 0 Open 0 Open VI/O (V) 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 VCORE(NOM) (V) 3.3 2.5 1.8 1.8 2.5 2.5 1.5 1.5
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VCORE Linear Regulator
The VCORE linear regulator can produce a +3.3 V, 2.5 V, 1.8 V, or 1.5 V output voltage at 500 mA. The input to the VCORE regulator is a terminal that may be connected to the VI/ O regulator output. The minimum input voltage must be VCORE(NOM) + 0.8 V.
0 Open Open Open Open
Open
0 0 Open Open
Open indicates terminal is not connected externally.
SUPERVISORY AND MISCELLANEOUS FUNCTIONS Introduction
The supervisor circuitry provides control of the RST line, an open drain signal, based on system operating conditions monitored by the 34710. VI/O, VCORE, VB+, and thermal shutdown (TSD) detectors in various parts of the chip are monitored for error conditions. Because other devices in the system may trigger a reset, the RST line itself is also monitored, but the supervisor circuitry controls all reset timing, including externally generated resets. Driving the RST line low causes the system to be held in the reset state. VI/O, VCORE, VB+, and thermal shutdown have both positive- and negative-going thresholds. The supervisor circuitry also ensures that the power supplies sequence properly. Specifically, that VI/O is never less than TBD V below VCORE. This means that VCORE - VI/O will be clamped at 0.5 V, and that the VCORE regulator operation will be suppressed during startup and shutdown to ensure that VCORE - VI/O = TBD V. parameters for responding to an externally applied RST signal. The rise time may be relatively slow, depending on the load capacitance, and the internal RST input gate must operate reliably (no oscillations during the transition) under these conditions, i.e., the RST input can be inhibited for up to tphsl(MAX). Error conditions must be present for a minimum time, tfilter, before the 34710 responds to them. Once all error conditions are cleared, RST is held low for an additional time of tdelay. If any monitored item falls below its negative-going threshold for tfilter, 1.0 s to 6.0 s, the tdelay will be restarted when system operating conditions are met. The trigger for the tdelay retriggerable one shot should be ([VI/O(LOW) + VCORE(LOW) + VB+(LOW) + TJ(TSD)] & tfilter), where tfilter is the 1.0 s to 6.0 s delay.
VI/O To Internal Gates From Internal Reset Circuits RPULLUP 4.7 k (Optional) RST CLOAD (Optional)
Static Operating Specifications
The RST output is an I/O device with an open drain output driver with a pullup and a CMOS digital input gate (Figure 3). This I/O structure allows wired OR connection to the MCU's RST I/O terminal, as well as allowing the MCU to initiate a reset cycle by driving its RST terminal low. When responding to a MCU request for a reset cycle, the 34710 must respond rapidly enough to prevent a glitch. Figure 2, page 9, shows the timing
Figure 3. RST Terminal Interface
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Vb Charge Pump
The high-side MOSFETs in the H-Bridge motor drivers and voltage regulators switch require a gate voltage in excess of VB+, which is provided by the Vb supply. The Vb regulator is a charge pump, switching directly off the VB+ supply, and uses an internal oscillator operating at 200 kHz.
Internal Oscillator
The internal oscillator provides timing for the charge pump and switching regulators.
APPLICATIONS Power Dissipation
The power budget is described in Table 2. The maximum dissipation for this device is 1.0 W continuous.
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Table 2. Power Budget
Functional Block Bias Charge Pump Switching Regulator Linear Regulator Total Watt 0.00 0.15 0.45 0.35 0.95
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PACKAGE DIMENSIONS
EW (Pb-FREE) SUFFIX 32-LEAD SOICW-EXPOSED PAD PLASTIC PACKAGE CASE 1324-02 ISSUE A 10.3 7.6 7.4 C 5
1 32
B 9
2.65 2.35
30X
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0.65
PIN 1 ID 4 B B 9 11.1 10.9 C L
16
17
5.15
2X 16 TIPS
A
32X
SEATING PLANE
0.3
ABC A (0.29) 0.25 0.19 6 0.13 0.38 0.22
M BASE METAL
0.10 A
NOTES: 1. ALL DIMENSIONS ARE IN MILLIMETERS. 2. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 3. DATUMS B AND C TO BE DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 4. THIS DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURRS. MOLD FLASH, PROTRUSION OR GATE BURRS SHALL NOT EXCEED 0.15 MM PER SIDE. THIS DIMENSION IS DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 5. THIS DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH AND PROTRUSIONS SHALL NOT EXCEED 0.25 MM PER SIDE. THIS DIMENSION IS DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 6. THIS DIMENSION DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED 0.4 MM PER SIDE. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSION AND ADJACENT LEAD SHALL NOT LESS THAN 0.07 MM. 7. EXACT SHAPE OF EACH CORNER IS OPTIONAL. 8. THESE DIMENSIONS APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.10 MM AND 0.3 MM FROM THE LEAD TIP. 9. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM. THIS DIMENSION IS DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTER-LEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY.
(0.203)
A
R0.08 MIN 0.25
GAUGE PLANE
PLATING M
MIN
0
0.29 0.13
CA
B
8 8 0
SECTION A-A ROTATED 90 CLOCKWISE
0.9 0.5 SECTION B-B
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NOTES
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NOTES
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NOTES
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Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. MOTOROLA and the Stylized M Logo are registered in the US Patent and Trademark Office. All other product or service names are the property of their respective owners. (c) Motorola, Inc. 2004 HOW TO REACH US: USA/EUROPE/LOCATIONS NOT LISTED: Motorola Literature Distribution P.O. Box 5405, Denver, Colorado 80217 1-800-521-6274 or 480-768-2130 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center 3-20-1 Minami-Azabu. Minato-ku, Tokyo 106-8573, Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong 852-26668334 HOME PAGE: http://motorola.com/semiconductors
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